Regviz

Allwinner /D1H /UART[3] /DLH

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Interpret as DLH

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Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/Allwinner/D1H/UART[3]/DLH#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0dlh

Description

UART Divisor Latch High Register

Fields

dlh

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data